Software Toolchain for Large-Scale RE-NFA Construction on FPGA

We present a software toolchain for constructing large-scale regular expression matching (REM) on FPGA. The software automates the conversion of regular expressions into compact and high-performance non-deterministic finite automata (RE-NFA) [17]. Assuming a fixed number of fan-out transitions per state, an n-state m-bytes-per-cycle regular expression matching engine (REME) can be constructed in O (n×m) time and O (n×m) memory by our software. The resulting circuit occupies no more than O (n×m) slices on FPGA. Based on the proposed algorithms, we develop prototype software that converts arbitrary regular expressions into RTL codes in VHDL, utilizing both logic slices and block memory (BRAM) available on FPGA devices. A large number of RE-NFAs are placed onto a twodimensional staged pipeline, allowing scalability to thousands of RE-NFAs with linear area increase and little clock rate penalty due to scaling. On a PC with a 2 GHz Athlon64 processor and 2 GB memory, our prototype software converts hundreds of regular expressions from Snort [2] into VHDL in less than 10 seconds. We also designed a benchmark generator which can produce regular expressions with configurable pattern complexity parameters, including state count, state fan-in, loop-back and feed-forward distances. Several regular expressions with various complexities are used to test the performance of our RE-NFA construction software.